Soft-core CPU based on RISC-V instruction set is successfully transplanted on SWORD4.0

Recently, the soft-core CPU based on RISC-V instruction set has been successfully transplanted on SWORD4.0, giving users a new experience of SWORD4.0, and users can even develop RISC-V applications through Arduino IDE.

Transplanted on SWORD4.0 is the F32C open source CPU based on the RISC-V instruction set. The CPU can support both the RISC-V instruction set and the MIPS instruction set by configuration.

Figure 1F32C github

By simply upgrading the Arduino IDE, the user can make the Arduino IDE support SWORD4.0 RISC-V compilation. A graphical programming environment and numerous Arduino examples facilitate user application development.

Figure 2 The upgraded Arduino IDE can compile RISC-V

Figure 3 Controlling LED brightness with RISC-V CPU

Figure 4 Controlling serial input and output with RISC-V CPU

Figure 5 Controlling 7-segment digital tube with RISC-V CPU

RISC-V is completely open source and extremely streamlined, making it ideal for applications such as IoT and edge computing. As a part of the SWORD ecosystem, RISC-V provides a surging power for the cultivation of computer system capabilities.

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