The mobile TV reception front end must have the sensitivity required to operate away from the transmitter and tolerate overload when there is a strong signal. Can be integrated into in-vehicle entertainment (ICE) systems, as well as mobile TV reception capabilities in a variety of portable electronic devices such as cell phones, portable digital assistants (PDAs), laptops, etc., even when the distance between the user's receiver and transmitter is There should also be good performance under the conditions of the itinerary (different from traditional broadcast TV). Combining a high-gain, low-noise amplifier (LNA) with a PIN diode bypass switch provides a low-cost solution for mobile TV receiver front ends with overload protection and high sensitivity.
The most practical way to implement a mobile TV receiver is to reduce the gain of the receiver under strong signal conditions. The variable RF signal gain simplifies the linearity requirements of the mixer stage, allowing the use of low cost RF ICs to build the receiver module. In a cascade analysis with a switchable/adjustable gain receiver front end, the improvement in the input third-order intercept point (IIP3) will be a function of gain variation. The adjustable gain receiver is better able to handle strong signals than fixed gain receivers.
The Automatic Gain Control (AGC) circuit can also be used to change the LNA gain, and since the AGC is typically implemented before the channel filter, it can respond to overloads from adjacent channel transmissions.
One way to reduce the RF gain is to shunt some of the RF signal to ground before the LNA. This method uses the least number of RF switching elements, but when the switch is turned off, the impedance is mismatched, which may affect other parts of the system. A workaround is to connect the damper element to the high impedance or "hot" end of the LNA parallel resonant network, although this approach sacrifices RF selectivity prior to the LNA from a larger gain control range.
When the received signal is overloaded to the stages behind the LNA, such as a mixer or intermediate frequency (IF) amplifier, the LNA stage can also be bypassed by means of a pair of RF switches. In the bypass state, the input signal is passed directly to the downconverter IC. As long as the devices in the bypass signal loop match the characteristic impedance (mobile TV is 75Ω), the chance of mismatch is minimized. Of course, the added switch makes the circuit more complicated.
Another approach is to reduce the RF gain by reducing the quiescent current of the active device supplied to the LNA. Amplifiers and devices using this technology, such as dual-gate MOSFETs, use additional device terminations to control the bias current. Since the switching element is not used, this gain control method is the simplest on the circuit, but its linearity is sacrificed because the collector/drain current is lower than the rated device DC operating point.
In order to meet the customer's LNA requirements for dual-mode (analog/digital) mobile TV receivers operating in the 47-870 MHz spectrum, several MMIC options were considered, but their linearity was not good enough and was not used. A broadband high-linearity MMIC LNA (MGA-68563) and an external PIN diode switch are used to design a solution.
This single-stage GaAs PHEMT LNA device has a gate width of 800 microns (Figure 3). The device's gate is connected to an internal current mirror to complement the effects of process variations and minimize the effects of threshold voltage variations. The LNA uses lossy negative feedback to achieve stability and smooth the amplitude response in a 3dB window (±1.5dB) in the 100MHz~1GHz spectrum.
The MMIC does not require output impedance matching due to its internal feedback and output return loss of less than 10 dB. But matching the inputs over such a wide frequency range (47~870MHz) proves to be not an easy task and requires an unconventional approach where the FET's drain current (Ids) is high to optimize the input return loss specification. The nominal value is 10 mA. The 20 mA Ids meet the input return loss performance requirements, but the Ids is chosen to be 30 mA to make it sufficiently wide to compensate for any effects of the increased PIN diode switching circuitry. Pin 4 of the MMIC LNA controls the current flowing through the internal bias current generator via an external resistor R1. Changing the size specification of R1 will change the Ids, but the supply voltage Vd will remain at 3V. Increasing the nominal Ids by a factor of three provides greater linearity.
When designing the LNA/switch circuit, the bypass switch used four PIN diodes. This is a common configuration for double pole double throw (DPDT) switches. The circuit works by turning the PIN diode pair at the top to be turned on, so that the lower pair is biased to zero and vice versa. In normal operation, only the low pair of PIN diodes are turned on, and the LNA amplifies the RF signal. When the RF gain must be reduced, the upper pair of PIN diodes are turned on and the RF signal is routed around the LNA in bypass mode. These resistors are used to regulate the forward current of the PIN diode and to isolate the RF signal from the logic control ports VSW1 and VSW2. The first design used a lot of components, so look for a simpler solution.
By communicating with our customers, we have developed a simpler double-pole single-throw (DPST) switch that simply connects or disconnects the bypass path to the input and output ports. Since the switching control of the LNA path is no longer performed, in order to utilize the inherent isolation characteristic of the unbiased FET, the LNA power supply (Vdd) must be turned off in the bypass mode. This approach reduces the return loss performance of the bypass path because it has a finite gate and drain impedance in which the unbiased FETs are connected in parallel.
In normal operation, the PIN diode power is turned off (VSW = 0V) and the LNA power supply is still restored to 3V. However, these zero-biased PIN diodes are subject to parasitic capacitance, so the gain and return loss performance of the LNA is compromised by incomplete isolation of the bypass path from the input and output ports.
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