Electrostatic discharges from the human body, the environment and even electronic equipment can cause various damages to precision semiconductor chips, such as penetrating thin insulating layers inside components; damaging the gates of MOSFETs and CMOS components; and trigger locking in CMOS devices. Short-circuit reverse-biased PN junction; short-circuit forward-biased PN junction; melting of the active device's internal solder or aluminum wire. In order to eliminate the electrostatic discharge (ESD) interference and damage to electronic devices, a variety of technical measures need to be taken to prevent them.
In the PCB board design, the ESD design of the PCB can be achieved through layering, proper placement and routing, and mounting. In the design process, most of the design modifications can be limited to increasing or decreasing components through prediction. By adjusting the layout of the PCB, ESD can be well guarded. Here are some common precautions.
Use multi-layer PCBs wherever possible. Compared to double-sided PCBs, ground plane and power plane, and closely spaced signal line-to-ground spacing can reduce common-mode impedance and inductive coupling to reach 1/1 of the double-sided PCB. 10 to 1/100. Try to place each signal layer close to a power or ground plane. For high-density PCBs with components on the top and bottom surfaces, with very short connection lines, and lots of padding, consider using inner-layer lines.
For double-sided PCBs, tightly interwoven power and ground grids are used. The power cord is close to the ground and should be connected as much as possible between the vertical and horizontal lines or the fill area. The grid size on one side is less than or equal to 60mm. If possible, the grid size should be less than 13mm.
Make sure each circuit is as compact as possible. As far as possible, put all connectors aside.
If possible, introduce the power cord from the center of the board and away from areas that are susceptible to direct ESD.
On all PCB layers leading to the connector outside the chassis (which is easily hit directly by the ESD), place a wide chassis or polygon-filled ground and connect them together with vias every approximately 13mm.
Place mounting holes on the edges of the board, and solder-free top and bottom solder pads are connected around the mounting holes to the chassis ground.
Do not apply any solder to the top or bottom pads during PCB assembly. Use screws with built-in washers to achieve close contact between the PCB and the metal chassis/shield or ground plane bracket.
The same "isolation zone" should be set between the chassis ground and the circuit ground in each floor; if possible, keep the separation distance at 0.64mm.
In the position where the top and bottom of the board are close to the mounting holes, the chassis ground and the circuit ground are connected together with a 1.27 mm wide wire every 100 mm along the chassis ground. Adjacent to these connection points, pads or mounting holes for mounting are placed between the chassis ground and the circuit ground. These ground connections can be cut with a blade to keep an open circuit or jumper with magnetic beads/high frequency capacitors.
If the circuit board does not fit into a metal chassis or shield, solder paste should not be applied to the top and bottom chassis grounds of the board so that they can act as discharge electrodes for ESD arcs.
To place a ring around the circuit in the following way:
(1) In addition to the edge connector and the chassis ground, an annular ground path is placed around the entire periphery.
(2) Ensure that the annular width of all layers is greater than 2.5mm.
(3) Rings are connected at intervals of 13mm.
(4) Connect the ring ground to the common ground of the multilayer circuit.
(5) For double panels installed in a metal chassis or shielding device, the ring should be connected to the circuit in a common way. The unshielded double-sided circuit should be connected to the chassis ground in a ring shape. The ring ground must not be coated with a solder mask so that the ring can act as a discharge pin for the ESD. Place at least one of the ring locations (all layers) at a certain location. A 0.5mm wide gap avoids the formation of a large loop. The distance of the signal wiring from the ring ground can not be less than 0.5mm.
In the area that can be hit directly by the ESD, a ground line should be placed near each signal line.
The I/O circuit should be as close as possible to the corresponding connector.
Circuits that are susceptible to ESD should be placed near the center of the circuit so that other circuits can provide them with shielding.
The series resistors and beads are usually placed at the receiving end, and for those cable drivers that are susceptible to ESD strikes, it is also possible to place series resistors or beads on the drive side.
Transient protectors are usually placed at the receiving end. Use a short, thick wire (less than 5 times the width, preferably less than 3 times the width) to the chassis ground. The signal and ground wires coming out of the connector must be directly connected to the transient protector before they can be connected to other parts of the circuit.
Place a filter capacitor at the connector or within 25 mm of the receiving circuit.
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